Static information storage and retrieval – Addressing
Patent
1991-01-08
1993-08-10
Fears, Terrell W.
Static information storage and retrieval
Addressing
36518901, G11C 1300
Patent
active
052355519
ABSTRACT:
A method for increasing the addressable memory space of an addressed line limited computer system. In the present invention, at least two memory planes, plane zero and plane one, are provided. Each memory plane contains the maximum number of addresses that can be addressed by the available address lines. The present invention constrains the starting addresses of individual character data that are valid in each memory plane. For example, if the addresses of the memory planes are configured in hexidecimal, memory plane zero contains valid starting addresses only at those locations having a least significant nibble of zero or eight. Memory plane one is constrained to have valid starting addresses, for example, at those addresses having a least significant nibble of "4" or "C". A processing means is provided to determine when a starting address is provided to the memory. The processor determines which memory plane can accept the starting address as a valid starting address and enables the address lines to communicate with that memory plane. More memory planes can be defined by reviewing more bits in the starting address. For example, if two bits are reviewed, four memory planes can be defined. For a given number of address lines N reviewed, the maximum number of memory planes is 2.sup.N.
REFERENCES:
patent: 5097118 (1992-03-01), Jijima
Lundquist Fred
Quayle Cliff
Sinofsky Brian
Fears Terrell W.
Pacific Data Products, Inc.
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