Memory address generating apparatus and method

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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Reexamination Certificate

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07007056

ABSTRACT:
A memory address generating method in which a memory bank index and an address control signal, that are required for a series of FFT processes in which a plurality of butterfly input samples are concurrently read from the same number of memory banks, a butterfly calculation is performed thereon by using the plurality of butterfly input samples, and the results are concurrently stored at the same position with the input samples, are calculated within a fixed small delay time by using a differential parity counter.

REFERENCES:
patent: 3673399 (1972-06-01), Hancke et al.
patent: 3803391 (1974-04-01), Vernet
patent: 3871577 (1975-03-01), Avellar et al.
patent: 4787055 (1988-11-01), Bergeon et al.
patent: 4841464 (1989-06-01), Guichard et al.
patent: 5339265 (1994-08-01), Liu et al.
patent: 2005/0010628 (2005-01-01), Vinitzky
Yutai et al., A hardware efficient control of memory addressing for high-performance FFT processors, Mar. 2000, IEEE transactions on signal processing, vol. 48, No. 3, pp. 917-921.
Johnson, A conflict free memory addressing for dedicated FFT hardware, May 1992, IEEE transactions on circuits and systems-II: analog and digital signal processing, vol. 39, No. 5, pp. 312-316.
Ayman et al., A modular pipelined implmentation of large Fast Fourier transforms, 2002, IEEE, pp. 995-999.
Danny, Simplified control of FFT hardware, 1976, IEEE transactions on acoustics, speech, and signal processing, pp. 577-579.
Yutai, An effective memory addressing scheme for FFT processor, Mar. 1999, IEEE transactions on signal processing, vol. 47, No. 3, pp. 907-911.

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