Patent
1995-05-25
1998-05-12
Chan, Eddie P.
G06F 1214
Patent
active
057519986
ABSTRACT:
A memory mapping and module enabling circuit for allowing logical 128 kbyte memory blocks to be defined for any location in any module connected to a memory system. A RAM is addressed by the system address lines defining 128 kbyte blocks, with the output data providing the row address strobe enable signals for a particular memory module and the address values necessary to place the 128 kbyte block within the module. Various other parameters such as write protect status and memory location are also provided by the RAM. Circuits and techniques for programming and reading the RAM are provided. The RAM is only programmed once, with modifications to the RAM-provided write protect status and memory location values being made based on write protect and relocation status information contained in a separate register.
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Belmont Brian V.
Hunsaker Mikal C.
Stancil Charles J.
Taylor Mark
Wunderlich Russell J.
Bragdon Reginald G.
Chan Eddie P.
Compaq Computer Corporation
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