Memory accessing system with an interface and memory selection u

Details Memory accessing system with an interface and memory selection u Memory accessing system with an interface and memory selection u

1993-12-10

1994-08-23

Dixon, Joseph L.

Boots, shoes, and leggings

364DIG1, 3642463, 364243, 3642466, G06F 1206

Patent

active

053414942

ABSTRACT:
A memory mapping and module enabling circuit for allowing logical 128 kbyte memory blocks to be defined for any location in any module connected to a memory system. A RAM is addressed by the system address lines defining 128 kbyte blocks, with the output data providing the row address strobe enable signals for a particular memory module and the address values necessary to place the 128 kbyte block within the module. Various other parameters such as write protect status and memory location are also provided by the RAM. Circuits and techniques for programming and reading the RAM are provided.

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