Memory accessing switch network

Details Memory accessing switch network Memory accessing switch network

1988-11-30

1991-08-20

Shaw, Gareth D.

Boots, shoes, and leggings

3642382, 370 941, 370 60, G06F 1300, G06F 1516

Patent

active

050419714

ABSTRACT:
In parallel processing computational apparatus, a switching network employing both routing switch elements and concentrator elements efficiently couples bit serial messages from a multiplicity of processors to a multiplicity of memory modules. The apparatus operates in a highly synchronous mode in which all processors issue memory requests only at essentially the same predetermined time within a frame interval encompassing a predetermined substantial number of clock periods. The routing switch elements and concentrator elements incorporate circuitry for comparing the addresses of requests which may be blocked at any element with requests which get through and, if the addresses are the same, returning the memory response to all processors seeking the same memory location.

REFERENCES:
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patent: 4789927 (1988-12-01), Hannah
patent: 4805091 (1989-02-01), Thiel et al.
patent: 4814980 (1989-03-01), Peterson et al.
patent: 4831519 (1989-05-01), Morton
Kraley et al, "A New Multiprocessor Architecture," Bolt Beraner & Newman, Inc., Report No. 3501, Dec. '78.

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