Memory access technique

Details Memory access technique Memory access technique

1974-01-23

1976-04-06

Shaw, Gareth D.

Communications: electrical

Digital comparator systems

G06F 1300

Patent

active

039493695

ABSTRACT:
In a digital computer system having a main memory operable at a first speed, a high speed buffer operating at a second speed for temporarily storing selected portions of the main memory, an associative memory for temporarily storing selected main memory addresses and comparing the stored addresses with a newly received address in a read/write operation to generate comparison data, a read only memory a bit configuration reflecting an algorithm, connected to the associative memory for generating a new order of priority for the memory address stored in the associative memory, and a storage unit connected from the read only memory for storing that order of priority for subsequent feedback to the read only memory in a subsequent cycle as a previous order of priority.

REFERENCES:
patent: 3275991 (1966-09-01), Schneberger
patent: 3292153 (1966-12-01), Barton
patent: 3333252 (1967-07-01), Shimabukuro
patent: 3339183 (1967-08-01), Bock
patent: 3344405 (1967-09-01), Craft
patent: 3693165 (1972-09-01), Reiley

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