Memory access technique

Details Memory access technique Memory access technique

1975-04-25

1977-11-01

Morrison, Malcolm A.

Boots, shoes, and leggings

G06F 1300

Patent

active

040568458

ABSTRACT:
A memory access technique for use in digital data processing apparatus, particularly in mini-computer systems, in which a plurality of memory modules are used, each of the modules having a main memory and a higher speed auxiliary, or "cache" memory, the data in the "cache" memories of a plurality of modules being capable of storage therein in an interleaved manner. Appropriate modifiable interconnection means, such as modifiable jumper connections, are provided on each memory module to permit the modules to be arranged for either interleaved or non-interleaved operation. As additional modules are added to the system, additional "cache" memory storage is automatically added and the capability of higher order interleaving becomes readily possible.

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Christensen et al. - Overrun Protection for Buffer Stacks; IBM Tech. Discl. Bulletin, vol. 15, No. 12, May 1973, pp. 3857-3858.

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