Static information storage and retrieval – Addressing – Counting
Patent
1991-04-09
1993-05-25
Sikes, William L.
Static information storage and retrieval
Addressing
Counting
365233, 36523009, G11C 800
Patent
active
052146111
ABSTRACT:
A memory cell array stores data in its row and column directions. A counter counts clock signal pulses, represents the counted value by using binary system, and outputs, as the column address, values occupying predetermined lower bit positions, while supplying values occupying predetermined upper and lower bit positions into an adder circuit. The adder circuit processes the values supplied, and outputs, as the row address, the values thus processed, so that the memory cell array is accessed diagonally.
REFERENCES:
patent: 4747080 (1988-05-01), Yamada
patent: 5105425 (1992-04-01), Brewer
patent: 5111434 (1992-05-01), Cho
Kawaai Toshimasa
Shigehara Hiroshi
Kabushiki Kaisha Toshiba
Sikes William L.
Tran Toan
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