Memory access control system in vector processing system

Details Memory access control system in vector processing system Memory access control system in vector processing system

1979-05-21

1981-10-06

Zache, Raulfe B.

Boots, shoes, and leggings

G06F 1300

Patent

active

042939410

ABSTRACT:
A memory access control system in a vector processing system comprises a memory unit, a memory device, address holding registers, a shift register and data buffer registers. The memory access control system distinguishes each vector data read out from the memory unit based upon the address holding registers by the output of the shift register. The shift register stores vector element numbers indicated by the memory device and transfers same to the data buffer registers. Each number from 0 to n-1, of a vector A composed of n elements a.sub.0, a.sub.1, a.sub.2, . . . a.sub.n-1, is a vector element number and each data, from a.sub.0 to a.sub.n-1, is vector element data.

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