Boots – shoes – and leggings
Patent
1990-09-11
1994-06-07
Lall, Parshotam S.
Boots, shoes, and leggings
395800, 364DIG2, 3642444, 3642445, 3642451, 364245, 3642526, 3642523, G06F 1204
Patent
active
053197690
ABSTRACT:
A data sizing circuit in a data flow type system is disclosed. A copy is made of the data included in a packet. The original first data of M.times.N bits is circulated by N-bit unit, where only the required bits are selectively written into the memory and read out. M (M is integer) is added to the address corresponding to the copied second data, and data of M.times.N bits is circulated by N-bit unit, where only the required bits are selectively written into the memory and read out. The first and second data read out from the memory are synthesized, circulated by N-bit unit, and output. Data of plural types with different data width can be read/written into an arbitrary address without wasting memory.
REFERENCES:
patent: 3739352 (1973-06-01), Packard
patent: 4138720 (1979-02-01), Chu et al.
patent: 4315312 (1982-02-01), Schmidt
patent: 4654781 (1987-03-01), Schwartz et al.
patent: 4654787 (1987-03-01), Finnell et al.
patent: 4814976 (1989-03-01), Hansen et al.
patent: 4860198 (1989-08-01), Takenaka
patent: 4992931 (1991-02-01), Hirasawa
patent: 5073969 (1991-12-01), Shoemaker
MC68020 32 Bit Microprocessor User's Manual, Motorola Inc., pp. 7-5-7-22 No Date.
Conlin David G.
Lall Parshotam S.
Lim Krisna
O'Connell Robert F.
Sharp Kabushiki Kaisha
LandOfFree
Memory access circuit for handling data pockets including data h does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Memory access circuit for handling data pockets including data h, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory access circuit for handling data pockets including data h will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-800727