Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation
Reexamination Certificate
2005-07-05
2005-07-05
Homere, Jean R. (Department: 2128)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Circuit simulation
C703S013000, C703S015000, C716S030000, C365S233100, C365S207000, C365S222000
Reexamination Certificate
active
06915251
ABSTRACT:
A memory device design is provided. The memory device includes a memory core having a depth that defines a plurality of words, and a word width that is defined by multiple pairs of a global bitline and a global complementary bitline. The memory device further includes a core cell having a bitline and a complementary bitline, and a flipped core cell that has a flipped bitline and a flipped complementary bitline. The multiple pairs of the global bitline and the global complementary bitline have a plurality of core cells that are defined by alternating ones of the core cell and the flipped core.
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Artisan Components Inc.
Ferris Fred
Homere Jean R.
Martine & Penilla & Gencarella LLP
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