Static information storage and retrieval – Floating gate – Data security
Reexamination Certificate
2000-01-25
2001-02-13
Zarabian, Amir (Department: 2824)
Static information storage and retrieval
Floating gate
Data security
C365S185330
Reexamination Certificate
active
06188602
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to semiconductor electrically erasable programmable read only memories, and specifically to a system for locking and unlocking flash memory to write data to the flash memory at selected times.
2. Description of the Related Art
In electrically erasable programmable read-only memory (EEPROM) known as flash memory, there is a software command sequence which can be used to erase all or part of the EEPROM memory device. This software command sequence is typically used to erase the device prior to re-programming and is very useful to update system software such as the basic input/output system (BIOS). Problems may arise, however, when the erase feature is used, either unintentionally or maliciously, to erase memory storing critical computer functions. Such erasures may be caused by programming errors or by viruses that are implanted maliciously to disable system operation.
Some flash memory systems include software and/or hardware features that allow flash memory to be unlocked during initialization of the computer system, and then re-locked once initialization is complete to protect the contents of the flash memory. Often, memory may be locked and unlocked on a block by block basis. This enables technology, such as plug and play, where hardware changes made while the computer system is powered down are automatically configured into the computer system during subsequent power-up initialization, thereby considerably reducing the complexity of making hardware changes for the user and improving system reliability.
Intel Corporation's 82802 firmware hub currently uses flash memory with two levels of status where the flash memory cannot be overwritten: write-locked and locked-down. The locked-down state prevents further set or clear operations to the write-lock and read-lock bits of the flash memory and provides the most protection from unauthorized erasures or overwriting. It is not possible to go from locked-down status to unlocked status without first powering down or resetting the computer system, however. The write-lock bit has similar limitations, as it must be set to the desired protection state prior to starting a program or erase operation and is sampled only at the beginning of the operation.
As computer system capability, as well as proliferation of malicious hacking and computer viruses increase, it is important to be able to update flash memory without interrupting operation of the computer system, and then to place it back in locked-down status once the update is complete for maximum security. Therefore, it is desirable to provide the capability to lock critical portions of flash memory to prevent it from being corrupted during initialization as well as during normal operation of the computer system.
SUMMARY OF THE INVENTION
The present invention provides a mechanism to reset flash memory to locked status without rebooting or powering down the computer system. This provides an advantage over the prior art in situations when it is desirable to update or change protected information residing in flash memory without interrupting operation of the computer system.
In one embodiment, the present invention provides a method for updating flash memory in a computer system during operation of the computer system when the flash memory is in a read only state, such as locked-down mode. The computer system includes a general purpose input/output port is coupled to reset circuitry for the flash memory. The method includes generating a reset signal, outputting the reset signal on a general purpose input/output port, sensing the reset signal, unlocking the flash memory to allow write access to the flash memory, updating the flash memory; and locking the flash memory to locked down mode.
In another embodiment, the present invention provides a computer system that includes a processor, a flash memory coupled to the processor, a general purpose input/output port coupled to the flash memory, first program instructions operable to generate a reset signal, output the reset signal to the general purpose input/output port, wherein the general purpose input/output port is coupled to reset circuitry for the flash memory, sense the reset signal, unlock the flash memory to allow write access to the flash memory, update the flash memory, and lock the flash memory to locked down mode.
In yet another embodiment, the present invention provides an apparatus for accessing locked-down flash memory in an operating computer system utilizing a general purpose input/output port coupled to the flash memory, and includes program instructions that generate a reset signal, output the reset signal to the general purpose input/output port, sense the reset signal, unlock the flash memory to allow write access to the flash memory, update the flash memory, and lock the flash memory to locked down mode. The program instructions are executed during normal operation of the computer system.
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Alexander Marc D.
Martin Todd
Bertani Mary Jo
Dell USA L.P.
Phung Anh
Skjerven Morrill & MacPherson LLP
Terrile Stephen A.
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