Electrical computers and digital processing systems: multicomput – Computer network managing
Reexamination Certificate
2004-08-12
2008-10-07
Cardone, Jason (Department: 2145)
Electrical computers and digital processing systems: multicomput
Computer network managing
C709S231000, C709S232000, C710S052000
Reexamination Certificate
active
07433946
ABSTRACT:
The techniques and mechanisms described herein are directed at transmitting elementary streams in a broadcast environment. The mechanisms provide a buffer controller and packet scheduler that allow a media format to be transmitted through the broadcasting environment in a manner resulting in a low channel switch delay. A buffer-fullness indicator allows the operation with various types of decoders. A lower bound and an upper bound are calculated for each frame within the elementary stream. The lower bound corresponds to an earliest time for sending the frame without causing an overflow condition within a decoder buffer. The upper bound corresponds to a latest time for sending the frame without causing an underflow condition within the decoder buffer. A send time is then scheduled based on the lower bound and the upper bound that determines when a packet associated with the frame is transmitted over a channel in a broadcast environment.
REFERENCES:
patent: 2005/0022253 (2005-01-01), Chen et al.
Cai Hua
Crinon Regis J.
Gao Guangping
Li Shipeng
Shen Guobin
Cardone Jason
Hossain Tanim
Lee & Hayess, PLLC
Microsoft Corporation
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