Mechanism for resetting sense circuitry to a known state in a no

Static information storage and retrieval – Floating gate – Particular biasing

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36518521, 3652335, G11C 1606

Patent

active

061152900

ABSTRACT:
A memory device including a nonvolatile memory cell, a bit line coupled to the nonvolatile memory cell, and circuitry coupled to the nonvolatile memory cell and the bit line. The circuitry is configured to reset the bit line to a predetermined state for an amount of time in response to a transition of an input address signal.

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