Mechanism for lossless tracing in an architecture having a...

Details Mechanism for lossless tracing in an architecture having a... Mechanism for lossless tracing in an architecture having a...

2007-12-04

2007-12-04

Vo, Ted T. (Department: 2191)

Data processing: software development, installation, and managem

Software program development tool

Testing or debugging

C717S129000, C717S130000

Reexamination Certificate

active

10713409

ABSTRACT:
A method for tracing an instrumented program using a thread, including transferring control of the instrumented program to a trap handler to obtain an original instruction associated with a probe, loading the original instruction into a scratch space, setting a program counter to point to the scratch space, setting a next program counter to point to a next instruction, and executing the original instruction in the scratch space using the thread, wherein executing the original instruction results in placing the instrumented program in a state equivalent to natively executing the original instruction.

REFERENCES:
Tamches, “Fine-Grained Dynamic Instrumentation of Commodity Operating System Kernels”, University of Wisconsin, pp. 1-141, 2001.
Uhlig et al., “Trace-Driven Memory Simulation: A Survey”, ACM, pp. 128-169, Jun. 1997.
Richard Moore, et al.; “IBM Dynamic Probes”; http://www-124.ibm.com/developerworks/opensource/linux/projects/dprobes/README, 2000.

Affiliated with

Also associated with

Rating

Mechanism for lossless tracing in an architecture having a... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Mechanism for lossless tracing in an architecture having a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Mechanism for lossless tracing in an architecture having a... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3848631