Mechanism for eliminating the restart penalty when reissuing...

Details Mechanism for eliminating the restart penalty when reissuing... Mechanism for eliminating the restart penalty when reissuing...

2007-11-06

2007-11-06

Chan, Eddie (Department: 2183)

Electrical computers and digital processing systems: processing

Instruction issuing

C712S228000

Reexamination Certificate

active

11058521

ABSTRACT:
One embodiment of the present invention provides a system which facilitates eliminating a restart penalty when reissuing deferred instructions in a processor that supports speculative-execution. During a normal execution mode, the system issues instructions for execution in program order, wherein issuing the instructions involves decoding the instructions. Upon encountering an unresolved data dependency during execution of an instruction, the processor performs a checkpointing operation and executes subsequent instructions in an execute-ahead mode, wherein instructions that cannot be executed because of the unresolved data dependency are deferred, and wherein other non-deferred instructions are executed in program order. When an unresolved data dependency is resolved during execute-ahead mode, the processor begins to execute the deferred instructions in a deferred mode. In doing so, the processor initially issues deferred instructions, which have already been decoded, from a deferred queue. Simultaneously, the processor feeds instructions from a deferred SRAM into the decode unit, and these instructions eventually pass into the deferred queue. In this way, at the start of deferred mode, deferred instructions can issue from the deferred queue without having to pass through the decode unit, thereby providing time for deferred instructions from the deferred SRAM to progress through a decode unit in order to read input values for the decoded instruction, but not to be re-decoded.

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“A large, fast instruction window for tolerating cache misses” Alvin R. Lebeck, Jinson Koppanalil, Tong Li, Jaidev Patwardhan, Eric Rotenberg May 2002 Publisher: IEEE Computer Society, ACM Press.
“Runahead execution: An effective alternative to large instruction windows” Mutlu, O.; Stark, J.; Wilkerson, C.; Patt, Y.N.; Micro, IEEE.
“Instruction Fetch Deferral using Static Slack”, by Gregory A. Muthler et al., Proceedings of the 35thAnnual IEEE/ACM International Symposium on Microarchitecture, 2002.

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