Static information storage and retrieval – Addressing – Counting
Reexamination Certificate
2005-07-05
2005-07-05
Elms, Richard (Department: 2824)
Static information storage and retrieval
Addressing
Counting
C365S145000, C365S185110, C365S185240, C711S103000
Reexamination Certificate
active
06914853
ABSTRACT:
A memory device having a wear out counter. The memory device includes at least one block of memory, that block having a metadata section associated with it. A number of bits in the metadata section are used to store the current state of a wear out counter. As the block is accessed, the counter is incremented, allowing a memory controller to level usage and to rectify any problems associated with wear out of that block. A method for incrementing the counter is also included.
REFERENCES:
patent: 5222109 (1993-06-01), Pricer
patent: 5485595 (1996-01-01), Assar et al.
patent: 5530828 (1996-06-01), Kaki et al.
patent: 5963970 (1999-10-01), Davis
patent: 6000006 (1999-12-01), Bruce et al.
patent: 6055180 (2000-04-01), Gudesen et al.
patent: 2003/0046493 (2003-03-01), Coulson
Elms Richard
Intel Corporation
Le Toan
Marger & Johnson & McCollom, P.C.
LandOfFree
Mechanism for efficient wearout counters in destructive... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Mechanism for efficient wearout counters in destructive..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Mechanism for efficient wearout counters in destructive... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3401658