Mechanism for dispensing liquid onto an integrated circuit...

Details Mechanism for dispensing liquid onto an integrated circuit... Mechanism for dispensing liquid onto an integrated circuit...

2001-02-12

2002-03-26

Edwards, Laura (Department: 1734)

Coating apparatus

With means to centrifuge work

C118S056000, C118S315000, C118S319000, C118S320000

Reexamination Certificate

active

06361599

ABSTRACT:

TECHNICAL FIELD
The present invention relates generally to IC (Integrated Circuit) wafer fabrication systems, and more particularly, to a mechanism for dispensing liquid onto the IC wafer with minimized back-splash to reduce bubble defects during fabrication of integrated circuits on the IC wafers.
BACKGROUND OF THE INVENTION
Referring to
FIG. 1
, liquid such as solution used for fabrication of integrated circuits on an IC (Integrated Circuit) wafer
102
is dispensed from a nozzle
104
of the prior art onto a surface
103
of the IC wafer
102
as the IC wafer
102
spins.
FIG. 1
shows a top view of the nozzle
104
placed across the diameter of the surface
103
of the IC wafer
102
.
FIG. 2
shows a side view of the nozzle
104
that is placed across the diameter of the surface
103
of the IC wafer
102
of FIG.
1
. Elements having the same reference number in
FIGS. 1 and 2
refer to elements having similar structure and function.
Referring to
FIGS. 1 and 2
, the nozzle
104
of the prior art includes a liquid chamber
106
that fills up with the liquid to be dispensed onto the surface
103
of the IC wafer
102
. In addition, the nozzle
104
of the prior art includes a plurality of nozzle passages that carry and direct the liquid from the liquid chamber
106
onto the surface
103
of the IC wafer
102
. The nozzle
104
includes a first nozzle passage
112
, a second nozzle passage
114
, a third nozzle passage
116
, a fourth nozzle passage
118
, a fifth nozzle passage
120
, a sixth nozzle passage
122
, and a seventh nozzle passage
124
. (Note that the plurality of nozzle passages
112
,
114
,
116
,
118
,
120
,
122
, and
124
in
FIGS. 1 and 2
are shown to be relatively large for clarity of illustration. However, a typical size of the each of the nozzle passages
112
,
114
,
116
,
118
,
120
,
122
, and
124
is approximately 0.5 millimeters).
These plurality of nozzle passages
112
,
114
,
116
,
118
,
120
,
122
, and
124
in the nozzle
104
of the prior art are directed vertically downward to be perpendicular to the surface
103
of the IC wafer
102
. Each of these nozzle passages
112
,
114
,
116
,
118
,
120
,
122
, and
124
in the nozzle
104
of the prior art directs a respective liquid stream of the liquid from the liquid chamber
106
toward the surface
103
of the IC wafer
102
as the IC wafer
102
spins (for example in the clockwise direction as illustrated in FIGS.
1
and
2
).
Thus, the first nozzle passage
112
carries and directs a first liquid stream
113
from the liquid chamber
106
toward the surface
103
of the IC wafer
102
. Similarly, the second nozzle passage
114
carries and directs a second liquid stream
115
from the liquid chamber
106
toward the surface
103
of the IC wafer
102
. The third nozzle passage
116
carries and directs a third liquid stream
117
from the liquid chamber
106
toward the surface
103
of the IC wafer
102
. The fourth nozzle passage
118
carries and directs a fourth liquid stream
119
from the liquid chamber
106
toward the surface
103
of the IC wafer
102
. The fifth nozzle passage
120
carries and directs a fifth liquid stream
121
from the liquid chamber
106
toward the surface
103
of the IC wafer
102
. The sixth nozzle passage
122
carries and directs a sixth liquid stream
123
from the liquid chamber
106
toward the surface
103
of the IC wafer
102
. The seventh nozzle passage
124
carries and directs a seventh liquid stream
125
from the liquid chamber
106
toward the surface
103
of the IC wafer
102
.
In the prior art, each of these liquid streams
113
,
115
,
117
,
119
,
121
,
123
, and
125
is directed vertically downward to be perpendicular to the surface
103
of the IC wafer
102
as the IC wafer
102
spins. In addition, in the prior art, each of these liquid streams
113
,
115
,
117
,
119
,
121
,
123
, and
125
is typically dispensed aggressively onto the surface
103
of the IC wafer
102
with much pressure.
Unfortunately in the prior art, a relatively large amount of back-splash of liquid dispensed onto the surface
103
of the IC wafer
102
results. Referring to
FIG. 2
, a layer of liquid
130
is dispensed onto the surface
103
of the IC wafer
102
from the nozzle of the prior art
104
. The surface
103
of the wafer
102
may have a layer of another material already deposited thereon. For example, the surface
103
of the wafer
102
may have a layer of photoresist
132
deposited thereon, and the layer of liquid
130
dispensed onto the IC wafer
102
may be developer solution for developing the layer of photoresist
132
.
Referring to
FIG. 2
, as the liquid streams
113
,
115
,
117
,
119
,
121
,
123
, and
125
are aggressively directed vertically downward toward the IC wafer
102
to be perpendicular to the surface
103
of the IC wafer
102
, back-splash of the liquid from the layer of liquid
130
on the IC wafer
102
results. With such back-splash, the liquid from the layer of liquid
130
bounce back up and away from the IC wafer
102
, and bubbles form within the layer of liquid
130
on the IC wafer
102
. Examples of such bubbles
140
,
142
,
144
, and
146
are shown in
FIG. 2
within the layer of liquid
130
on the IC wafer
102
.
Such bubbles
140
,
142
,
144
, and
146
are more prone to form with the nozzle
104
of the prior art because the liquid streams are directed toward the IC wafer
102
with relatively high pressure. In addition, such bubbles
140
,
142
,
144
, and
146
are more prone to form with the nozzle
104
of the prior art because the liquid streams are directed vertically downward toward the IC wafer
102
to be perpendicular to the surface
103
of the IC wafer
102
as the IC wafer
102
is spinning. The velocity of the IC wafer
102
as the IC wafer
102
is spinning creates a force against a liquid stream when the liquid stream contacts the IC wafer
102
, and such force contributes to the back-splash of the liquid when the liquid stream contacts the layer of liquid
130
.
A bubble is located at a respective location within the layer of liquid
130
directly above the IC wafer
102
, and such a bubble causes that respective location of the IC wafer
102
to be exposed to a low volume of liquid of the layer of liquid
130
. However, proper exposure of the IC wafer
102
to a sufficient amount of liquid of the layer of liquid
130
dispensed onto the wafer
102
is desired for proper fabrication of integrated circuit structures on the IC wafer
102
. With a bubble within the layer of liquid
130
, the respective location of the IC wafer
102
having the bubble thereon may not be exposed to a sufficient volume of liquid of the layer of liquid
130
. Such insufficient volume of liquid of the layer of liquid
130
at that location of the IC wafer
102
results in an integrated circuit defect at that location of the IC wafer
102
, and such an integrated circuit defect may be referred to as a “bubble defect.”
Furthermore, a long-recognized important objective in the constant advancement of monolithic IC (Integrated Circuit) technology is the scaling-down of IC dimensions. Such scaling-down of IC dimensions reduces area capacitance and is critical to obtaining higher speed performance of integrated circuits. Moreover, reducing the area of an IC die leads to higher yield in IC fabrication. Such advantages are a driving force to constantly scale down IC dimensions. Referring to
FIG. 2
, as IC dimensions are further scaled down to submicron and nanometer dimensions, a bubble formed within the layer of liquid
130
is more likely to cause defects within integrated circuit structures with such scaled down dimensions on the IC wafer
102
.
Thus, to generally minimize defects within integrated circuits on the IC wafer
102
, and further in light of the importance of scaling down IC dimensions, a mechanism is desired for effectively dispensing liquid onto the IC wafer with minimized back-splash to reduce bubble defects during fabrication of integrated circuits on the IC waf

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