Electrical computers and digital processing systems: multicomput – Computer-to-computer data routing – Least weight routing
Reexamination Certificate
1998-12-18
2003-01-21
Oberley, Alvin (Department: 2151)
Electrical computers and digital processing systems: multicomput
Computer-to-computer data routing
Least weight routing
C345S503000, C345S545000
Reexamination Certificate
active
06510470
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates in general to graphics display systems and in particular to asynchronous data transfers to graphics display systems. Still more particularly, the present invention relates to supporting asynchronous data transfers to graphics display systems concurrently with other processes generating graphics output for the frame buffer.
2. Description of the Related Art
A typical personal computer or workstation graphics system consists of a graphics adapter providing a frame buffer and graphics acceleration hardware, together with a software device driver providing an interface between the graphics adapter hardware and the operating system and/or applications running on top of the operating system. This serves to facilitate display of elaborate graphics while relieving the operating system of computational responsibility for graphics processing, improving overall performance.
In a multitasking environment, however, access to hardware devices such as the graphics adapter must be serialized so that the hardware state may be managed and maintained consistently for each process. This imposes a constraint on continuous, asynchronous data transfers from a video source such as a video capture device (e.g., “Webcam”), a digital television signal source, video streaming from a network device, and the like.
While such continuous, asynchronous data transfers should be transmitted directly to the physical memory linear aperture of the graphics adapter frame buffer via direct memory access (DMA) or other means, for many commercial graphics adapters, the frame buffer linear aperture is not accessible at the same time as the graphics accelerator hardware is being utilized. If an asynchronous data transfer is in progress when some process concurrently attempts to utilize the graphics accelerator hardware (which disables the linear aperture), the asynchronous data transfer may fail in some manner. At best this failure may be manifested as a visible glitch in the display of the asynchronous data transfer; at worst, the failure may result in system corruption and/or hang.
One solution would be to serialize (i.e. time multiplex) data transfer operations to the frame buffer linear aperture with access to the graphics accelerator hardware. However, such serialization defeats the desired asynchronous functioning of the data transfer operations concurrently with other processes in a multitasking environment.
It would be desirable, therefore, to provide a mechanism for supporting asynchronous data transfers to a frame buffer linear aperture concurrently with other processes normally utilizing the graphics adapter accelerator hardware to generate graphics output for the frame buffer.
SUMMARY OF THE INVENTION
It is therefore one object of the present invention to provide an improved graphics display system.
It is another object of the present invention to provide an improved method and system for supporting asynchronous data transfers to graphics display systems.
It is yet another object of the present invention to provide support for asynchronous data transfers to graphics display systems concurrently with other processes generating graphics output for the frame buffer.
The foregoing objects are achieved as is now described. A module is interposed between a multitasking operating system and the device driver for a graphics adapter including a frame buffer with a linear aperture for continuous, asynchronous data transfers. The interposed module may selectively intercept all graphics device driver function requests or simply pass such requests to the device driver, and provides a mechanism for generating graphics output in the frame buffer without utilizing graphics accelerator hardware on the graphics adapter. The interposed module is aware of the start and stop of asynchronous data transfers to the frame buffer. When asynchronous data transfers are started, the interposed module invokes the graphics adapter device driver to obtain access to the frame buffer linear aperture and sets its own internal state to active. While active, the interposed module intercepts all graphics device driver requests and employs its own mechanism to generate graphics output in the frame buffer responsive to such requests, without utilizing the graphics accelerator hardware. Since the graphics accelerator hardware is not utilized, the frame buffer linear aperture always remains enabled. While inactive, the interposed module simply passes all graphics device driver requests to the device driver. The interposed module is preferably implemented in accordance with the GRADD architecture model, with the mechanism for generating graphics output being provided by the VMAN and SOFTDRAW libraries.
The above as well as additional objects, features, and advantages of the present invention will become apparent in the following detailed written description.
REFERENCES:
patent: 4823304 (1989-04-01), Frantz
patent: 5245702 (1993-09-01), McIntyre
patent: 5418962 (1995-05-01), Bodin
patent: 5715459 (1998-02-01), Celi
patent: 6104359 (2000-08-01), Endres
patent: 6240468 (2001-05-01), Capelli
Bracewell & Patterson L.L.P.
Hoang Phuong
LaBaw Jeffrey S.
Oberley Alvin
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