Measuring skew using on-chip sampling

Details Measuring skew using on-chip sampling Measuring skew using on-chip sampling

2001-08-14

2003-12-09

Assouad, Patrick (Department: 2857)

Data processing: measuring, calibrating, or testing

Measurement system in a specific environment

Electrical signal parameter measurement system

C702S106000, C702S117000, C714S700000

Reexamination Certificate

active

06662126

ABSTRACT:

BACKGROUND OF INVENTION
A typical computer system includes numerous computer chips (also referred to as “chips” and “integrated circuits”), which are small pieces of semiconducting material (usually silicon) on which integrated circuits are embedded. In order to electronically couple a computer chip to other parts of the computer system, various chip packages are used.
A chip package, which houses semiconductor devices in strong, thermally stable, hermetically sealed environments, provides a semiconductor device with electronically connectivity to circuitry external to the semiconductor device.
FIG. 1
shows one prior art type of chip package assembly that involves wire bond connections. The wire bonding process involves mounting a computer chip (
20
) to a substrate (
22
) with its inactive backside (
24
) down. Wires (not shown) are then bonded between an active side (
26
) of the computer chip (
20
) and the chip package (not shown).
FIG. 2
shows a more recently developed prior art type of chip package assembly that involves flip-chip connections. A flip-chip (
40
) is a semiconductor chip having bumps (
42
) on bond pads (not shown) formed on the active side (
44
) of the chip (
40
), where the bumps (
42
) are used as electrical and mechanical connectors. The chip (
40
) is then inverted and bonded to a substrate (
46
) by means of the bumps (
42
). In other words, the front or active side of the chip (
40
) is attached to the chip package. Several materials, such as conductive polymers and metals (referred to as “solder bumps”), are commonly used to form the bumps (
42
) on the chip (
40
). If the bumps (
42
) are solder bumps, the solder bumps (not shown) can be used to form solder joints between the chip (
40
) and the substrate (
46
).
Regardless of how the chip (
40
) is attached to the substrate (
46
), a gap (
48
) exists between the chip (
40
) and the surface of the substrate (
52
). Because the chip (
40
) and the substrate (
46
) have different material properties, e.g., different coefficients of thermal expansion, different operating temperatures, different mechanical properties, etc., stress develops in the solder joints formed by the bumps (
42
) between the substrate (
46
) and the chip (
40
). Therefore, in order to enhance the integrity of the solder joints, an underfill material (
50
) is introduced into the gap (
48
) between the substrate (
46
) and the chip (
40
).
As a periodic signal is distributed to various parts of a chip through a chip package, the arrival time of the periodic signal edges at different points on the chip may vary due to process variations, voltage variations, thermal variations, etc. that are inherent in the chip and the chip package. This difference in the arrival time of the periodic signal edges at different points on the chip is typically referred to as skew. Because skew may adversely affect the performance of a chip, accurately measuring skew and being able to compensate for the measured skew has become an important concern for chip designers.
With traditional chip packages such as those that expose the active side of the chip, skew can be measured by physically accessing the chip and probing a particular signal at different points on the chip. However, with flip-chip packages, this sort of probing is not feasible because the active side of the chip rests on the chip package, and is thus not exposed to allow conventional signal probing techniques.
SUMMARY OF INVENTION
In one aspect, a method for measuring skew of an on-chip signal on a computer chip comprises distributing an externally generated reference signal to the computer chip, inputting the externally generated reference signal and the on-chip signal to a first on-chip sampler, where the first on-chip sampler resides at a first point on the computer chip, inputting the externally generated reference signal and the on-chip signal to a second on-chip sampler, where the second on-chip sampler resides at a second point on the computer chip, selectively modulating the externally generated reference signal to determine at least one transition of the on-chip signal at the first point and the second point, and determining skew of the on-chip signal between the first point and the second point dependent upon an output from the first on-chip sampler and an output from the second on-chip sampler.
In another aspect, a method for measuring skew of an on-chip signal on a computer chip comprises selectively modulating an externally generated reference signal to detect a transition of the on-chip signal at a first on-chip sampler, outputting a first transition indication from the first on-chip sampler when the transition is detected at the first on-chip sampler, selectively modulating the externally generated reference signal to detect the transition of the on-chip signal at a second on-chip sampler, outputting a second transition indication from the second on-chip sampler when the transition is detected at the second on-chip sampler, and determining skew of the on-chip signal between a location of the first on-chip sampler and a location of the second on-chip sampler based on the difference between the first transition indication and the second transition indication.
In another aspect, an on-chip sampler that is used to measure skew of an on-chip signal comprises an inverting/buffering stage that inputs an externally generated reference signal and generates a first control signal and a second control signal that are used in the on-chip sampler, a first stage that inputs the on-chip signal and outputs a signal to the second stage based on the first and second control signals, and a second stage that inputs the signal outputted from the first stage based on the first and second control signals, where the externally generated reference signal is modulated to detect a transition on the on-chip signal.
In another aspect, a distribution of on-chip samplers comprises a first on-chip sampler positioned at a first point on a computer chip, a second on-chip sampler positioned at a second point on the computer chip, and a last on-chip sampler positioned at a last point on the computer chip, where an externally generated reference signal and an on-chip signal serves as inputs to the first, second, and last on-chip samplers.
Other aspects and advantages of the invention will be apparent from the following description and the appended claims.


REFERENCES:
patent: 4928278 (1990-05-01), Otsuji et al.
patent: 5003256 (1991-03-01), Merrill
patent: 5231598 (1993-07-01), Vlahos
patent: 5760478 (1998-06-01), Bozso et al.
patent: 5991890 (1999-11-01), Brown et al.
patent: 6587976 (2003-07-01), Yun et al.

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