Means to avoid data distortion in clock-synchronized signal samp

Details Means to avoid data distortion in clock-synchronized signal samp Means to avoid data distortion in clock-synchronized signal samp

1992-01-27

1994-08-23

Chin, Stephen

Pulse or digital communications

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375 95, 375111, 3408252, H04L 700

Patent

active

053414039

ABSTRACT:
Signal-sampling apparatus wherein information signals are directed to a register under the control of first clock pulses and are latched into the register under the control of second clock pulses. A calibrator monitors the timing of the first and second clock pulses to determine if they are so close together that data signals subsequently output from the register will be distorted so as to cause errors in downstream devices. If such condition is found, the calibrator inverts the phase of the second clock pulses to assure proper time spacing to avoid data corruption.

REFERENCES:
patent: Re33665 (1991-08-01), Ogawa
patent: 4694294 (1987-09-01), Denhez et al.
patent: 4716528 (1987-12-01), Wight
patent: 4782499 (1988-11-01), Clendening
patent: 5018168 (1991-05-01), Matsuoka
patent: 5056120 (1991-10-01), Taniguchi et al.
patent: 5099477 (1992-05-01), Taniguchi et al.

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