Maximum value/minimum value extractor and method

Communications: electrical – Digital comparator systems

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G06F 702

Patent

active

058670882

ABSTRACT:
A minimum value/maximum value extractor and method including: a multiplexer for outputting data and inverted data receiving from data lines depending on a maximum/minimum value selecting signal; a plurality of maximum value extracting parts for receiving the output of the multiplexer, a clock signal and a reset signal, the extracting parts outputting a first output which becomes the same signal state as that of the initially input data bits and maintains "0" regardless of subsequent data bits value once the input data bit becomes "0" until the reset signal is applied, and a second output which follows the first output value by delayed by two clock cycles; a maximum value/minimum value signal generator for outputting a value which is a NORed value of all inputs from the extracting parts as a minimum value or a value which is an inverted value of the NORed value of all inputs from the extracting parts as a maximum value; and a plurality of reset signal generators for generating the reset signal for resetting the first output of the extracting parts as an initial value if the two input signals are at the same state,

REFERENCES:
patent: 5721809 (1998-02-01), Park
Computer Arithmetic Principles, Architecture, and Design, Kai Hwang, 2.4 "Complementers and Magnitude Comparators," pp. 43-46.

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