Maximum negative number detector

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364748, 36471504, G06F 738

Patent

active

047899565

ABSTRACT:
Prior to normalizing floating point number, a maximum negative number detector is employed. In order to determine whether a number is a maximum negative number, the inventive scheme examines the left-most (most significant) bit of the bit sequence to be scaled is examined. For positive numbers (where the bit is a zero) the normalize count is carried out without modification. Upon encountering a negative number the bits of the number are examined. The maximum negative number detector contains logic circuitry that counts the displacement from the left-most bit position to the location of the first zero bit from that position. It also counts the displacement from the right-most bit position to the location of the first one bit from that position. For a maximum negative number (one or more ones followed ony by one or more zeros) these two counts will differ by a single bit. This value is then used to prescale the normalization counter so that normalization may proceed.

REFERENCES:
patent: 3831012 (1974-08-01), Tate et al.
patent: 4166271 (1979-08-01), Thirlwall
patent: 4539549 (1985-09-01), Hong et al.

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