Maximum likelihood sequence estimation apparatus

Pulse or digital communications – Repeaters – Testing

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371 43, 341 51, H04L 2706

Patent

active

050816519

ABSTRACT:
A maximum likelihood sequence estimation apparatus for estimating a transmitted signal sequence from a received signal sequence and an estimated channel impulse response characteristic. A merge detection circuit computes a time required for respective merges, that is, the time required for convergence of all possible state paths to one state, instructs the maximum likelihood sequence estimation circuit to output a decided maximum likelihood data sequence to a channel impulse response characteristic estimation circuit based on such merge time and instructs a received signal hold circuit to output a held received signal to the channel impulse response characteristic estimation circuit. Thereafter, the channel impulse response characteristic estimation circuit immediately estimates the channel impulse response characteristic using the data from the maximum likelihood sequence estimation circuit and the received signal hold circuit. The apparatus allows the channel impulse response characteristic to be estimated at a higher speed, thus improving system efficiency.

REFERENCES:
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patent: 4710746 (1987-12-01), Shimoda et al.
patent: 4730322 (1988-03-01), Pollara-Bozzola
patent: 4885757 (1989-12-01), Provence
patent: 4905317 (1990-02-01), Suzuk et al.

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