Maximum length linearly occurring code sequence generator

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364717, G06F 1110

Patent

active

049455370

ABSTRACT:
A circuit includes a code sequence generator which generates a maximum length linearly occurring code sequence and which has a plurality of code data outputs coupled to respective inputs of a multiplexer, the multiplexer having an output which is coupled to an input of a three-state buffer. The output of the multiplexer and an output of the buffer are coupled to respective output terminals of the circuit. A control circuit supplies select signals to the multiplexer which cause the multiplexer to couple a selected one of its inputs to its output, and supplies to the buffer a control signal which selectively enables and disables the buffer.

REFERENCES:
patent: 4160236 (1979-07-01), Oka et al.
patent: 4216540 (1980-08-01), McSpadden
patent: 4845654 (1989-07-01), Harada et al.
patent: 4912666 (1990-03-01), Harada et al.
Peterson & Weldon, Error Correcting Codes, 2nd Edition, The MIT Press, Cambridge, Mass., 1972, pp. 170-188.

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