Matrix-structured neural network with learning circuitry

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364807, G06F 1518

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active

050832859

ABSTRACT:
A multi-layer perceptron circuit device using integrated configuration which is capable of incorporating self-learning function and which is easily extendable. The device includes: at least one synapse blocks containing: a plurality of synapses for performing weight calculation on input signals to obtain output signals, which are arranged in planar array defined by a first and a second directions; input signal lines for transmitting the input signals to the synapses, arranged along the first direction; and output signal lines for transmitting the output signal from the synapses, arranged along the second direction not identical to the first direction; at least one input neuron blocks containing a plurality of neurons to be connected with the input signal lines; and at least one output neuron blocks containing a plurality of neurons to be connected with the output signal lines.

REFERENCES:
patent: 4326259 (1982-04-01), Cooper et al.
patent: 4507577 (1985-03-01), Kwan
patent: 4752906 (1988-06-01), Kleinfeld
patent: 4773024 (1988-09-01), Faggin et al.
patent: 4802103 (1989-01-01), Faggin et al.
patent: 4866645 (1989-09-01), Lish
patent: 4901271 (1990-02-01), Graf
patent: 4962342 (1990-10-01), Mead et al.
Murray et al., "Asynchronous VLSI Neural Networks Using Pulse-Stream Arithmetic", IEEE Journal of Solid-State Circuits, v. 23, N. 3, Jun. 1988, pp. 688-697.
Sage et al., "An Artificial Neural Network Integrated Circuit Based on MNOS/CeD Principles", Neural Networks for Computing, 1986, pp. 381-385.
Hirai, "Representation of Control Structures by a Model of an Associative Processor, HASP", IEEE First International Conference on Neural Networks, V. II, pp. 447-454.
Raffel et al., "A Generic Architecture for Water-Scale Neuromorphic Systems, " Prol. IEEE 1st Annual Conference on Neural Networks, V. II, 1988, pp. 173-180.
Fukushima, K., "A Neural Network for Visual Pattern Recognition", IEEE Computer, Mar. 1988, pp. 65-75.
Furman et al., "An Analog CMOS Backward Error-Propagation LSI", Neural Networks, vol. 1, Supp. 1, 1988, pp. 1-4.
Furman et al., pp. "An Analog CMOS Backward Error-Propagation LSI, Neural Networks Abstracts of the First Annual Inns Meeting", Boston, vol. 1, Supplement 1, 1988, pp. 1-4.

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