Matrix converter

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

Reexamination Certificate

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C257S723000, C361S761000

Reexamination Certificate

active

06559532

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is directed to an arrangement of power semiconductor components in a suitable mounting device as matrix converter.
2. Description of the Prior Art
European Application 0 8333 431 discloses a three-phase matrix current converter, whereby nine main switches combined in three switch groups as well as a respective auxiliary commutation means with an auxiliary switch fashioned as four-segment switch are present between the switch groups. IGBTS each having inverse diode, two blockable GTO thyristors connected parallel or two series-connected parallel circuits of an asymmetrical GTO with an inverse diode are recited as switches. With this device, it is possible to convert a.c. voltages of a given amplitude and frequency into a.c. voltages of an arbitrary amplitude and frequency. Such matrix converters will achieve great significance in future since, given little reactance onto the power network, they open up the possibility—given generating operation of a motor driven therewith—of re-supplying the energy that the motor delivers into the power network. Previous arrangements of power switches that are suitable for such matrix converters are so complex that a compact integration is not possible.
The publication by T. Ogura et al., “High frequency 6000 V double gate GTOs with buried gate structure” in Proceedings of 1990 International Symposium on Power Semiconductor Devices & ICs, pages 252-255, describes a component structure wherein semiconductor rides with doped regions and contactings are fashioned on two opposite top sides of a substrate for forming a GTO thyristor. U.S. Pat. No. 5,608,237 discloses a bidirectional semiconductor switch, whereby ICBT structures are formed at two opposite top sides of a substrate of semiconductor material. As a result of the additional control electrode, such a bidirectional IGBT enables the control of the emitter frequency, and a component having very good switching and pass properties can be realized in this way. German OS 198 01 192 discloses a method for the manufacture of bidirectional power semiconductor switches by wafer bonding.
In contrast to the components described therein, conventional IGBTs have three terminals: collector, emitter and gate. In IGBT modules—the most frequently employed format—, the collector is soldered onto a ceramic substrate, and emitter and gate are contacted via bond connections. There are also IGBTs and power diodes in wafer cells. Emitter and collector therein are connected via a pressure contact; the gate connection can ensue via a spring contact. Bidirectional components that have terminal contacts at two principal sides lying opposite one another require a new formatting technique that deviates therefrom. The housing or mounting devices for such components must be designed such that the various terminals can be contacted electrically insulated from one another.
SUMMARY OF THE INVENTION
An object of the present invention is to specify a matrix converter for high current intensities and voltages that can be manufactured in a compact way.
This object is achieved in accordance with the principles of the present invention in a matrix converter constructed of nine bidirectional power semiconductor switches that have respectively at least one terminal contact for the current flow—referred to below as emitter terminal—at principal sides that lie opposite one another. Further, a contact for controlling the switch function—referred to below as gate contact—is located on each principal side. Such a power semiconductor switch can, for example, be a bidirectional IGBT, whereby an IGBT structure with a channel controlled with a gate electrode is present at each of the two principal sides lying opposite one another. By applying suitable potentials to the gate contacts of the gate electrodes, the bidirectional IGBT can be switched to transmit or block in both directions of the current. In order to have a reference potential for the voltage applied for the switching, the respective potential adjacent at the emitter terminals is tapped and conducted to the drive circuit provided for the circuit of the component. This is necessary since high fluctuations of the a.c. voltages to be commutated occur under certain circumstances on the power lines to be switched.
Nine bidirectionally blocking power semiconductor components are arranged in the form of a three-row matrix, so that the one principal sides are at least approximately arranged in one plane, and the other principal sides are correspondingly at least approximately arranged in a co-planar plane spaced therefrom, so that nine principal sides are present on each side of the matrix-like arrangement, i.e. lie in respectively one of two mutually opposite directions of view in a plan view onto the arrangement. Respectively three current conductors arranged next to one another, preferably parallel to one another, are present at both sides of the arrangement. The current conductors at the one side of the matrix-like arrangement proceed at an angle, preferably at a right angle, relative to the current conductors at the other side of the arrangement. Expressed in other words, this means that three current conductors aligned next to one another proceed in longitudinal direction over the component matrix and three current conductors aligned next to one another proceed in transverse direction under the component matrix. The power semiconductor components are arranged adjacent to a respective current conductor, preferably over it or, form, under it, and can form a single chip.
As a result of bidirectional closing of one of the switches, one of the three current conductors proceeding in longitudinal direction is connected to one of the three current conductors proceeding in transverse direction. Three inputs can therefor be selectively connected to three outputs with this arrangement. The respectively three current conductors functioning as inputs or outputs are preferably formed by metallic busbars. Contacts of the power semiconductor components fashioned raised on these busbars can be durably electrically conductively attached by soldering, gluing or with a pressing mechanism.
It is especially expedient to fashion the various lines to the gate and auxiliary emitter terminals as interconnects on or in a thin, insulating printed circuit board or film. The corresponding contact surfaces of the power semiconductor components are secured to contact surfaces provided therefor. The power semiconductor components can be additionally secured to other surface portions of the printed circuit board or film, so that the matrix-like arrangement of the nine power semiconductor elements can thereby be already largely fixed. Such a printed circuit board or film can be present at both sides of the arrangement of the power semiconductor components or at only one of the two respective principal sides. When the lower busbars are secured on a substrate, the leads to the gate terminals and the auxiliary emitter terminals can be arranged within the substrate. The upper terminals can then be formed by leads in a printed circuit board or film that is attached on the upper side of the matrix-like arrangement. The upper busbars that proceed transversely relative to the lower busbars are preferably attached to an upper part that presses from above onto the chips with the power semiconductor components. Alternatively, a film carrying interconnects can be present between the lower busbars applied on a substrate and the matrix-like arrangement. In this case, the terminals of the power semiconductor components can be connected to suitably arranged interconnects in a notoriously known way, for example with bond wires, said interconnects being secured, for example, to an upper part that carries the upper busbars.


REFERENCES:
patent: 4253054 (1981-02-01), Steigerwald
patent: 5608237 (1997-03-01), Aizawa et al.
patent: 5793064 (1998-08-01), Li
patent: 198 04 192 (1999-08-01), None
patent: 0 681 330 (1995-11-01), None
patent: 0 833 431 (1998-04-01),

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