Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2001-05-22
2004-05-18
Hjerpe, Richard (Department: 2674)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S076000
Reexamination Certificate
active
06738031
ABSTRACT:
TECHNICAL FIELD
This invention relates to matrix array display devices with light sensing elements. More particularly, the invention is concerned with a matrix array display device having addressable pixels which include a display element, and a light sensing element. The invention is concerned especially, but not exclusively, with matrix display devices using electroluminescent display elements, particularly organic electroluminescent display elements, OLEDs' include polymer electroluminescent elements, PLED's.
BACKGROUND AND SUMMARY
An example of a matrix display device whose pixels comprise electroluminescent (EL) display elements and light sensing elements is described in British Patent Application No. 0005811448.115. The described device comprises an active matrix display device having an array of pixels carried on a substrate, in which each pixel includes a current-driven electroluminescent display element comprising light emitting EL material between two electrodes, one of which is transparent, and a switching device operable to control the current through the display element, and hence its light output, in a drive period based on a drive (data) signal applied to the pixel in a preceding address period.
As in other active matrix EL display devices, the display elements, which need to continuously pass current in order to generate a light output, can be energised for an extended period, up to a frame time, following the addressing of the pixel in a respective row address period with the level of the data signal stored in the pixel in the address period determining its output during this drive period. The driving device, in the form of a thin film transistor (TFT), is responsible for controlling the current through the display element and the applied data signal is stored as a charge on a capacitance coupled to the gate of this drive TFT so that the operation of the TFT is dependent on the stored charge.
The pixels in the device of British Patent Application No. 0005811.5 further include a photosensitive device, comprising a (PiN) photodiode or a photo-responsive TFT, coupled to the storage capacitance that is arranged in operation of the pixel to be reverse biased and is responsive to light emitted by the pixel's display element in the drive period so as to leak charge from the capacitance at a rate dependent on the display element's light output level. Thus, by virtue of the photosensitive device, opto-electronic feedback is provided which progressively adjusts the operation of the drive TFT controlling energisation of the display element during the drive period to reduce the current flow through the display element, and hence its light output, by progressively discharging the capacitance (assuming it is charged upon addressing). The proportion of the total available drive period for which the display element is energised is, therefore, dependent on, and regulated by, this feedback arrangement according to the element's light output. In this way the integrated light output from a display element in a drive (frame) period can be controlled so as, inter alia, to counteract any effects of ageing or degradation in the display element's electroluminescent material, particularly a reduction in light output level for a given drive current level which can occur over a period of time of operation, and also to compensate for the effects of voltage drops occurring in current carrying lines supplying the pixels.
Such a technique is valuable in achieving a high quality display by ensuring that pixel light outputs can be constant and uniform over time. However, the implementation of such a pixel circuit can be problematic. The photocurrent generated by the photosensitive device needs to be very small in order to appropriately control the TFT gate potential over a frame period if the use of a large storage capacitance is to be avoided. The relationship between the capacitance and the active area of the photosensitive device needs to be carefully determined. Also the provision in each pixel circuit of the light sensitive element using thin film technology ideally should not unduly complicate fabrication.
According to the present invention, there is provided a matrix display device comprising on a substrate an array of addressable pixels each having a display element and a display element control circuit for controlling the operation of the display element, wherein the display element control circuit includes a charge storage capacitor and an associated thin film photosensitive semiconductor device coupled to the storage capacitor for regulating charge stored on the storage capacitor in accordance with light falling on the photosensitive device, wherein the photosensitive device comprises a strip of semiconductor material having doped contact regions laterally spaced on the substrate and an intervening region, and wherein the storage capacitor comprises a conductive layer extending substantially transversely of the semiconductor strip over one contact region thereof with dielectric material being disposed between the conductive layer and that contact region.
Thus, one side, or plate, of the storage capacitor is constituted by a contact region of the photosensitive device, thereby eliminating the need for a separate conductor track to be provided to interconnect the two components and resulting in a compact structure. More importantly, because the contact region of the photosensitive device forms one side of the capacitor then a desired relationship between the storage capacitor and the photosensitive device, and particularly the capacitance value of the storage capacitor and the operational photo-response characteristics of the photosensitive device in the pixel, can be ensured more reliably. Problems due to manufacturing tolerances in thin film device technology, and especially those arising from masking and etching steps used in photolithographic patterning processes commonly employed to define thin film layers, such as small positional errors in mask placement, can lead to dimensional variations in the defined layers. As both the capacitor and the photosensitive device share the same critical layer, namely the semiconductor strip, then any line width dimensional variations in the defined layer forming this strip which may occur as a result of the use of such processes will be common to both the capacitor and the photosensitive device. Thus, the active area of the photosensitive device and the capacitance of the storage capacitor will scale together. Accordingly, the effects of such variations, in terms of the capacitance of the storage capacitance, which is mainly dependent on the area of overlap between the contact region and the conductive layer since the thickness of its dielectric layer can be more precisely controlled, and the active area of the photosensitive device, which is dependent typically on the size of the junction at one contact region corresponding to the width of the semiconductor strip, tend to cancel one another out. A desired, predetermined, relationship between the capacitance and the operational characteristic of the photosensitive device can, therefore, be achieved.
The provision of the photosensitive device and capacitor components is entirely compatible with standard thin film technology used for fabricating matrix display devices, particularly active matrix display devices using TFTs, and can be achieved in simple manner. The basic structure of the photosensitive devices is generally similar to that of TFTs and, accordingly, they can be fabricated easily at the same time as the TFTs in array using common thin film layers. The photosensitive device preferably comprises a gated device and may comprise a TFT structure having similarly doped contact regions and an intrinsic semiconductor region therebetween over which a gate dielectric layer and a gate are disposed. Alternatively, the device may comprise a lateral, gated, pin diode device having a similar structure except that the contact regions are oppositely doped.
The invention
Shannon John M.
Young Nigel D.
Hjerpe Richard
Koninklijke Philips Electronics , N.V.
Laneau Ronald
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