Matrix arithmetic circuit for processing matrix transformation o

Details Matrix arithmetic circuit for processing matrix transformation o Matrix arithmetic circuit for processing matrix transformation o

1989-09-15

1990-09-11

Shaw, Dale M.

Boots, shoes, and leggings

G06F 738

Patent

active

049568019

ABSTRACT:
A matrix arithmetic circuit for processing matrix transformation operations includes a random access memory (RAM) for storing a plurality of numbers in Modulo 256 with multiple tap points numbers format. A multiplier multiplies two of the Modulo 256 numbers in RAM to obtain a product. The product is normalized and added to a third Modulo 256 number stored in the RAM to obtain a result. The result is stored in the RAM and coupled to the data processing system for use in matrix transformation operations.

REFERENCES:
patent: 4811268 (1989-03-01), Nishitani et al.
patent: 4860317 (1989-08-01), Tomlinson
patent: 4864527 (1989-09-01), Peng et al.

Affiliated with

Also associated with

Rating

Matrix arithmetic circuit for processing matrix transformation o does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Matrix arithmetic circuit for processing matrix transformation o, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Matrix arithmetic circuit for processing matrix transformation o will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1189200