Matrix arithmetic apparatus

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364728, G06F 1534

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active

041504348

ABSTRACT:
A matrix arithmetic apparatus which comprises a plurality of exclusive memories provided correspondingly to the respective items of a matrix or vector each including a plurality of elements in order to store element data corresponding to the elements. An arithmetic operation of Y=A.multidot.X+B is carried out with respect to the element data read out the memories wherein multiplication (A.multidot.X) and addition {(A.multidot.X)+B} of data representing the respective elements are undertaken by the exclusive arithmetic units by a pipe line system. Internal address computers corresponding to the memories are provided in order to determine a memory address of each of the memories from which a stored data is to be read out.

REFERENCES:
patent: 3557357 (1971-01-01), Porter
patent: 3697734 (1972-10-01), Booth et al.
patent: 3701976 (1972-10-01), Shively
patent: 3748451 (1973-07-01), Ingwersen
patent: 3794984 (1974-02-01), Deerfield
L. C. Higbie, "Vector Floating- Point Data Format", IEEE Trans. on Computers, vol. c-25, No. 1, Jan. '76, pp. 25-32.

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