Matrix addressable displays

Fishing – trapping – and vermin destroying

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Details

437 50, 359 58, 359 59, H01L 27105

Patent

active

052780864

ABSTRACT:
In a method of forming a matrix addressable display comprising a group of switchable cells, such as liquid crystal cells, having electrodes on each of two parallel plates and thin-film drive transistors disposed on one of the plates, gate resistors are provided by elongate doped polysilicon regions connecting the gate electrodes to address lines. The gate resistors prevent short-circuiting of the address lines in the event of a gate short-circuit occurring in any of the transistors.

REFERENCES:
patent: 4514895 (1985-05-01), Nishimura
patent: 4678282 (1987-07-01), Yaniv et al.
patent: 4775861 (1988-10-01), Saito
patent: 4884875 (1989-12-01), Okumura
patent: 4963503 (1990-10-01), Aoki et al.

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