Boots – shoes – and leggings
Patent
1994-10-13
1996-07-16
Envall, Jr., Roy N.
Boots, shoes, and leggings
364748, G06F 738
Patent
active
055373453
ABSTRACT:
An input register holds, as an input operand to be square rooted, a floating-point number with an exponential radix is 2. An approximation of the reciprocal of a square root is retrieved from a table information store unit by an address composed of a least significant bit of an exponent and upper bits of a mantissa provided from the input register. The mantissa, with a leading bit appended, is normalized by a normalization circuit in units of two bits. An output of a remainder hold circuit in which a 0th remainder serves as a normalized operand is multiplied by a retrieved approximation to find a partial square root. Partial square roots found in iterative calculations are merged by a digit place alignment circuit and an adder. By making use of an inverter, a multiplicand generator, and an (R+S.times.T) arithmetic unit, a remainder being used in the next iterative calculation is found by subtracting a product of the merged square root times the partial square root from a remainder found in the preceding iterative calculation.
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patent: 4193115 (1980-03-01), Albus
patent: 4215402 (1980-07-01), Mitchell et al.
patent: 4928274 (1990-05-01), Gilhousen et al.
patent: 5065352 (1991-11-01), Nakano
patent: 5157624 (1992-10-01), Hesson
patent: 5278782 (1994-01-01), Nakano
Envall Jr. Roy N.
Matsushita Electrical Industrial Co. Ltd.
Moise Emmanuel L.
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