Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
2004-12-21
2008-12-16
Malzahn, David H (Department: 2193)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
Reexamination Certificate
active
07467177
ABSTRACT:
Described are mathematical circuits that perform flexible rounding schemes. The circuits require few additional resources and can be adjusted dynamically to change the number of bits involved in the rounding. In one embodiment, a DSP circuit stores a rounding constant selected from the group of binary numbers 2(M−1)and 2(M−1)−1, calculates a correction factor, and sums the rounding constant, the correction factor, and a data item to obtain a rounded data item.
REFERENCES:
patent: 4639888 (1987-01-01), Nussbaecher
patent: 4680628 (1987-07-01), Wojcik et al.
patent: 4780842 (1988-10-01), Morton et al.
patent: 5095523 (1992-03-01), Delaruelle et al.
patent: 5349250 (1994-09-01), New
patent: 5455525 (1995-10-01), Ho et al.
patent: 5600265 (1997-02-01), El Gamal et al.
patent: 5724276 (1998-03-01), Rose et al.
patent: 5754459 (1998-05-01), Telikepalli
patent: 5809292 (1998-09-01), Wilkinson et al.
patent: 5828229 (1998-10-01), Ahanin et al.
patent: 5883525 (1999-03-01), Tavana et al.
patent: 5914616 (1999-06-01), Young et al.
patent: 5933023 (1999-08-01), Young
patent: 6000835 (1999-12-01), Pan et al.
patent: 6014684 (2000-01-01), Hoffman
patent: 6038583 (2000-03-01), Oberman et al.
patent: 6069490 (2000-05-01), Ochotta et al.
patent: 6100715 (2000-08-01), Agrawal et al.
patent: 6134574 (2000-10-01), Oberman et al.
patent: 6223198 (2001-04-01), Oberman et al.
patent: 6249144 (2001-06-01), Agrawal et al.
patent: 6366943 (2002-04-01), Clinton
patent: 6397238 (2002-05-01), Oberman et al.
patent: 6448808 (2002-09-01), Young et al.
patent: 6449708 (2002-09-01), Dewhurst et al.
patent: 6457116 (2002-09-01), Mirsky et al.
patent: 6483343 (2002-11-01), Faith et al.
patent: 6556044 (2003-04-01), Langhammer et al.
patent: 6573749 (2003-06-01), New et al.
patent: 6693455 (2004-02-01), Langhammer et al.
patent: 6820102 (2004-11-01), Aldrich et al.
patent: 6864714 (2005-03-01), Digari et al.
patent: 6873182 (2005-03-01), Mohan et al.
patent: 6904446 (2005-06-01), Dibrino
patent: 6920627 (2005-07-01), Blodget et al.
patent: 6925480 (2005-08-01), Duborgel
patent: 6947916 (2005-09-01), Luo et al.
patent: 7129762 (2006-10-01), Vadi
patent: 7142010 (2006-11-01), Langhammer et al.
patent: 7174432 (2007-02-01), Howard et al.
patent: 7178130 (2007-02-01), Chuang et al.
patent: 7193433 (2007-03-01), Young
patent: 7194598 (2007-03-01), Jacob
patent: 7197686 (2007-03-01), Box et al.
patent: 2003/0041082 (2003-02-01), Dibrino
patent: 2003/0055861 (2003-03-01), Lai et al.
patent: 2004/0010645 (2004-01-01), Scheuermann
patent: 2004/0030736 (2004-02-01), Scheuermann
patent: 2004/0078403 (2004-04-01), Scheuermann et al.
patent: 2004/0093465 (2004-05-01), Ramchandran
patent: 2004/0093479 (2004-05-01), Ramchandran
patent: 2004/0143724 (2004-07-01), Jacob et al.
patent: 2004/0168044 (2004-08-01), Ramchandran
patent: 2004/0181614 (2004-09-01), Furtek et al.
patent: 2005/0038984 (2005-02-01), Heidari-Bateni et al.
patent: 2005/0039185 (2005-02-01), Heidari-Bateni et al.
patent: 2005/0144210 (2005-06-01), Simkins et al.
patent: 2005/0144211 (2005-06-01), Simkins et al.
patent: 2005/0144212 (2005-06-01), Simkins et al.
patent: 2005/0144213 (2005-06-01), Simkins et al.
patent: 2005/0144216 (2005-06-01), Simkins et al.
patent: 2005/0187998 (2005-08-01), Zheng et al.
patent: 2006/0015701 (2006-01-01), Hogenauer
patent: 2006/0190516 (2006-08-01), Simkins et al.
patent: 2006/0190518 (2006-08-01), Ekner et al.
patent: 2006/0195496 (2006-08-01), Vadi et al.
patent: 2006/0206557 (2006-09-01), Wong et al.
patent: 2006/0212499 (2006-09-01), New et al.
patent: 2006/0230092 (2006-10-01), Ching et al.
patent: 2006/0230093 (2006-10-01), New et al.
patent: 2006/0230094 (2006-10-01), Simkins et al.
patent: 2006/0230095 (2006-10-01), Simkins et al.
patent: 2006/0230096 (2006-10-01), Thendean et al.
patent: 2006/0288069 (2006-12-01), Simkins et al.
patent: 2006/0288070 (2006-12-01), Vadi et al.
patent: WO 01/89091 (2001-11-01), None
patent: WO 2005/066832 (2005-07-01), None
patent: WO 2005/010049 (2005-11-01), None
patent: WO 2005/110049 (2005-11-01), None
David, Raphael et al., “Dart: A Dynamically Reconfigurable Architecture Dealing with Future Mobile Telecommunications Constraints”; Parallel and Distributed Processing Symposium; Proceedings International, IPDPS 2002; Copyright 2002 IEEE; Apr. 15-19, 2002; pp. 156-163.
Mirsky, E., Dehon, A., “Matrix: A Reconfigurable Computing Device with Configurable Instruction Distribution (Extended Abstract)”, In Proc. IEEE Workshop on FPGAs for Custom Computing Machines, 1996, pp. 1-3.
Mirsky, E., Dehon, A., “Matrix: A Reconfigurable Computing Architecture with Configurable Instruction Distribution and Deployable Resources”, In Proc. IEEE Workshop on FPGAs for Custom Computing Machines, Apr. 17-19, 1996, pp. 1-10.
Palacharla, S., Jouppi N, P., Smith, J. E. “Complexity-effective superscalar processors”, In Proc. The 24th Annual Int. Symp. Computer Architecture, Denver, CO, Jun. 1997, pp. 206-218.
U.S. Appl. No. 11/019,518, filed Dec. 21, 2004, Simkins, James M. et al., Applications of Cascading DSP Slices, Xilinx, Inc. 2100 Logic Drive, San Jose, California 95124.
Fijioka, Y. et al., “Design of a Reconfigurable Parallel Processor for Digital control Using FPGAs”, IEICE Transactions on Electronics, Institute of Electronics Information and communications; vol. E77-C, No. 7; Jul. 1994; pp. 1123-1129.
Xilinx, Inc., “The Programmable Logic Data Book 1999,” pp. 1-62, available from Xilinx, Inc., 2100 Logic Drive, San Jose, California 95124.
Xilinx, Inc., “Virtex4 FPGA Handbook” Ch. 10 ExtremeDSP Design Considerations, Aug. 2, 2004, pp. 461-508, available from Xilinx, Inc., 2100 Logic Drive, San Jose, California 95124.
Ching Alvin Y.
New Bernard J.
Simkins James M.
Wong Jennifer
Young Steven P.
Behiel Arthur J.
Malzahn David H
Webostad W. Eric
Xilinx , Inc.
LandOfFree
Mathematical circuit with dynamic rounding does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Mathematical circuit with dynamic rounding, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Mathematical circuit with dynamic rounding will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4052302