Matched filter circuit

Details Matched filter circuit Matched filter circuit

1996-10-23

1999-07-20

Chan, Jason

Pulse or digital communications

Receivers

Particular pulse demodulator or detector

375200, 375208, 364825, H03D 100, H04L 2706

Patent

active

059265124

ABSTRACT:
A matched filter circuit for mobile communications is disclosed. The circuit may be fabricated in a small size using large-scale integration and can perform high-speed processing and double sampling at a reduced rate of power consumption. In one embodiment, a plurality of sampling and holding circuits each including a switch are divided into two groups. A control circuit successively closes one of the switches in the first group every chip time, while successively closing one of the switches in the second group at a timing shifted by one-half chip time from that of the first group, thereby enabling a double-sampling operation. Outputs of the sampling and holding circuits in each group are summed by an analog circuit with a high degree of linearity, resulting in a high processing speed combined with a reduced circuit size and power consumption.

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Takana et al., "Development of Low Power Consumption LSI for SS Communication," Technical Report of IEICE, SST95-77 (1995-10), pp. 31-36, The Institute of Electronica, Information and Communication Engineers, 1995.
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