Match line control circuit for content addressable memory

Details Match line control circuit for content addressable memory Match line control circuit for content addressable memory

1999-12-21

2000-11-14

Zarabian, A.

Static information storage and retrieval

Associative memories

Ferroelectric cell

365203, G11C 1500

Patent

active

061478911

ABSTRACT:
A match line control circuit includes a weak, static pull-up transistor and a strong, dynamic pull-up transistor coupled between a match line of an associated CAM and a supply voltage. Prior to compare operations, both the static pull-up transistor and the dynamic pull-up transistor are in a conductive state and thereby quickly charge the match line to the supply voltage. During compare operations, the dynamic transistor is turned off to reduce current flow between the supply voltage and the match line. In some embodiments, the static pull-up transistor and the dynamic pull-up transistor are configured to match the parasitics of the CAM cells 10 coupled to the match line, thereby increasing performance of the associated CAM.

REFERENCES:
patent: 4523301 (1985-06-01), Kadota et al.
patent: 5396449 (1995-03-01), Atallah
patent: 5483480 (1996-01-01), Yoneda
patent: 5740097 (1998-04-01), Satoh

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