Match-insensitive low-current bias circuit

Electricity: power supply or regulation systems – Self-regulating – Using a three or more terminal semiconductive device as the...

Reexamination Certificate

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C327S538000

Reexamination Certificate

active

06201377

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to low current bias circuits. In particular, the present invention relates to low bias current sources in integrated circuit applications.
2. Description of the Related Art
Biasing techniques which are used in discrete circuit applications are not normally suited for use in integrated circuits. In an integrated circuit (“IC”), large resistors and capacitors are more difficult to manufacture than transistors. Consequently, IC designers have devised biasing techniques which use transistors wherever possible. In an IC, a constant current is often generated at one location and is distributed throughout the IC using current mirrors and steering circuits.
Biasing in IC design is often based on the well-known bandgap reference. A bandgap reference circuit takes advantage of a very stable delta base-to-emitter voltage (V
BE
) between two conducting bipolar junction transistor (“BJT”) to provide a constant current, which is then used as a reference current. In one such reference current, the voltage difference (&Dgr;V
BE
, typically approximately 60 mV) between two bipolar transistors' V
BE
's are applied across a known resistance to create a reference current. The reference current is then scaled by bias circuits to bias other circuits in the IC. To ensure that the reference current is stable across the integrated circuit, the bias circuits are fabricated within a set of tolerance and specifications matching those of the bandgap reference. For example, a bias circuit designed to operate with a 2 uA current source must be coupled to a bandgap reference which can accurately provide such a current.
In general, transistors fabricated on the same substrate can have matched characteristics which track changes in both the fabrication process and operating parameters (e.g., temperature). Manufacturing tolerances and design tolerances determine how closely circuits can be matched. If the design is sensitive to mismatches, manufacturing tolerance must be tightened. Otherwise, low production yield and device reliability would result. Circuit matching becomes more critical as bias currents reach the sub-nanoampere level, which is required in today's power devices.
The following equation relates in a BJT a change in voltage V
BE
to a change in collector current:
I
new
I
old
=

Δ



V
BE
V
T
(
1
)
where I
old
and I
new
are the collector currents of a BJT before and after an increase of &Dgr;V
BE
in voltage V
BE
; and V
T
(~26 mV) is the thermal voltage. Equation (1) can be rewritten as:
Δ



V
BE
=
V
T

ln

I
new
I
old
(
2
)
Thus, equation (1) provides that a 60 mV change in V
BE
results in a ten-fold increase in collector current. Similarly, equation (2) provides that an 8% change in collector current results in a 2 mV change in V
BE
.
A low-current bias circuit
100
in the prior art is shown in FIG.
1
. As shown in
FIG. 1
, circuit
100
includes transistors Q
8
and Q
9
of equal size, and resistor R
5
(180 K&OHgr;) coupled between an output terminal of current source
101
(which has a current I
source
of 1 &mgr;A) and the collector terminal (V
5
) of transistor Q
8
. The base terminal of transistor Q
8
is also coupled to the output terminal of current source
101
. The base terminal of transistor Q
9
is coupled to collector terminal (V
5
) of transistor Q
8
. The collector terminal of transistor Q
9
is coupled to the circuit intended to be biased.
For our purpose, the base current of a BJT is negligible relative to the collector current. Thus, collector current I
c8
of transistor Q
8
is equal to current I
source
of current source
101
. Since resistor R
5
provides a voltage drop of 180 mV from supply voltage V
CC
, the V
BE
of transistor Q
8
exceeds the V
BE
of transistor Q
9
by 180 mV, thus output current I
out
of transistor Q
9
is approximately 1 nA, as provided by equation (1) above (i.e. I
out
=10
−6
*e
−180/26
=0.984*10
−9
). Circuit
100
can thus be used to supply a low bias current in an IC. Also, if circuit
100
is fabricated on the same substrate as the bandgap reference circuit which provides current source
101
, circuit
100
tracks the bandgap reference over variations in fabrication process and temperature.
Circuit
100
, however, is sensitive to circuit mismatches. For example, if the resistance of resistor R
5
is lowered by 10% due to a variation in the fabrication process, the voltage across resistor R
5
decreases by 18 mV, which causes an increase of the same magnitude in the V
BE
voltage of transistor Q
9
. Consequently, the output current I
out
of transistor Q
9
doubles. Thus, a 10% change in resistor R
5
results in a 100% increase in output current I
out
. Clearly, such match-sensitivity does not meet today's production yield and device reliability requirements.
Thus, a need for a low-current bias circuit that is relatively insensitive to circuit mismatches is desired.
SUMMARY OF THE INVENTION
The present invention provides a low-current bias circuit which is relatively insensitive to circuit mismatches. In one embodiment, a circuit of the present invention combines the effects of current degeneration, current gain, and voltage gain to minimize any errors caused by circuit mismatches created during fabrication.


REFERENCES:
patent: 3979688 (1976-09-01), Maidique
patent: 4461992 (1984-07-01), Yamaguchi et al.
patent: 4574251 (1986-03-01), Jason
Product Summary: “Strain-gauge amp has high gain”, by John Christensen, National Semiconductor, Santa Clara, California, date unknown, one page.
“Precision op amp shrugs off problem of Y2K—and beyond”, Fran Granville, EDN Leading Egde, Sep. 24, 1998, p. 11.
“Microelectronic Circuits”, Second Edition, Adel S. Sedra and Kenneth C. Smith, Holt, Rinhart and Winston, date unknown, pp. 512-113.
“Intuitive IC Electronics”, Second Edition, Thomas M. Frederiksen, McGraw-Hill Publishing Company, date unknown, pp. 97-99.
“Analysis and Design of Analog Integrated Circuits”, Third Edition, Paul R. Gray, Robert G. Meyer, John Wiley & Sons, Inc., date unknown, pp. 346-347.

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