Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular power supply distribution means
Reexamination Certificate
2005-01-18
2005-01-18
Abraham, Fetsum (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Gate arrays
With particular power supply distribution means
C257S690000, C257S700000, C257S734000, C257S748000, C257S909000, C438S982000, C438S279000
Reexamination Certificate
active
06844576
ABSTRACT:
A placing and wiring method for a master slice type semiconductor integrated circuit is provided. The method is conducted by an automatic placing and routing apparatus with respect to a master slice100having a plurality of basic cells110formed in a matrix, in which first and second power source wirings170and171that traverse the plurality of basic cells110are connected to a plurality of signal wirings that are formed along a vertical direction to provide connections within each of the plurality of basic cells110and/or between the plurality of basic cells110. The method includes: a first step of registering in the automatic pacing and routing apparatus definitions of effective pin positions A1-A14, B2-B13and C1-C14; a second step of registering a net list in the automatic placing and routing apparatus; and a third step of determining the placement of pin positions and wiring routes, based on data for the definitions of the effective pin positions and the net list. The registered effective pin positions are provided on lattice grids120,located inside and outside a region between the first and second power source wirings170and171. In the circuit wired according to the definitions, contacts with respect to the drains are provided inside and outside the region between the first and second power source wirings170and171, and the signal wirings do not cross the power source wirings.
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Abraham Fetsum
Hogan & Hartson LLP
Seiko Epson Corporation
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