Master slice type semiconductor circuit device

Static information storage and retrieval – Interconnection arrangements

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Details

365189, 357 45, 307465, G11C 506

Patent

active

047808462

ABSTRACT:
A master slice type semiconductor circuit device including a memory block having at least one memory circuit; one conductive layer provided to peripheral portions of the memory circuit and used as an input portion thereto; power source lines provided to the peripheral portion of the memory circuit and formed by a conductive layer different from the conductive layer of the input portion; and a contact hole for connecting between the two conductive layers at a selected input portion. The selected input portion connected by the contact hole is set or clamped to a predetermined logic level by the power source line. This enables a change of the memory capacity or the function of the memory block to satisfy customer requirements.

REFERENCES:
patent: 4255672 (1981-03-01), Ohno et al.
patent: 4523106 (1985-06-01), Tanizawa et al.
patent: 4525809 (1985-06-01), Chiba et al.
patent: 4660174 (1987-04-01), Takemae et al.

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