Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1992-05-07
1994-10-04
Westin, Edward P.
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307270, 307468, H03K 1716
Patent
active
053529391
DESCRIPTION:
BRIEF SUMMARY
FIELD OF THE INVENTION
The present invention relates to master slice semi-conductor integrated circuits such as gate arrays. More specifically, the present invention relates to master slice semiconductor integrated circuits in which the value of the output current can be variably controlled internally or externally.
BACKGROUND OF THE INVENTION
In general, gate arrays have a row of cells which are a collection of basic cells each comprising a plurality of insulated gate field effect transistors (hereinafter referred to as MIS's) and a plurality of input/output cells (I/O cells), and a large scale logic circuit and the like can be configured as desired by simply providing a wiring channel and the like on the chid with a power line and a signal line depending on user specification.
Various types of cell configuration have been proposed as a library for the input/output cells (I/O cells), and they are all I/O buffer based configuration, in order for the output transistor of I/O cells to be compatible with an external TTL, it needs to have capability of allowing a sink current of 0.4 mA cells at a potential difference of 0.4 V, for example. The value of the output current can be varied by connecting a single output signal line from a dedicated logic circuit comprising internal basic cells to a plurality of I/O cells by changing the wiring layout. However, once it has been incorporated into a chip-packaged electronic circuit after the wiring process has been completed, the value of the output current is consistently fixed and, therefore, there is no flexibility to make it possible to save power consumption depending on changes in system environment or to perform high power driving when required. Though the value of the output current may be varied to some extent by adjusting the voltage level of the external power source, it is not preferred to vary the level of the power source voltage because it has influence on other elements. In recent years, there has been a need for semiconductor integrated circuits which make it possible to actively variably adjust a predetermined value of an output current in the system environment after chip-packaging.
Considering the above-mentioned need, the present invention realizes master slice semiconductor integrated circuits in which the value of the output current can be variably controlled internally or externally.
SUMMARY OF THE INVENTION
Master slice semiconductor integrated circuits have a row of cells which are a collection of basic cells each comprising a plurality of transistors and a plurality of input/output cells (I/O cells) formed around a chip, and the desired logic circuit is configured with the basic cells by providing wiring on the chip. This invention includes a control signal generating means which generates a control signal by performing logical operation according to the output and input signals of the logic circuit and a current value changing signal which is an external signal, and it is also equipped with a current supplying means which is formed between one of the power source potentials and the output terminal in parallel and which has two or more current paths which are opened and closed by control signals from the control signal generating means. In such configuration, control signals for controlling the current supplying means are generated by the control signal generating means according to the logic of the output sisal from the dedicated logic circuit comprising internal basic cells, and the logic of the current value changing means. The current supplying means consists of two or more current paths and these current paths are controlled to open and close by control signals. As a result, the number of current paths may be changed according to the control signals and, therefore, it is possible to select the potential supplied to outside between high and low levels and to select a plurality of discrete values for the output current. Therefore, when the circuit to be connected to outside is driven at the high level, the amount of the current supp
REFERENCES:
patent: 4959564 (1990-09-01), Steele
patent: 5089722 (1992-02-01), Amedeo
patent: 5153450 (1992-10-01), Ruetz
Hirabayashi Yasuhisa
Oguchi Yasuhiro
Ookawa Kazuhiko
Sakuda Takashi
Sanders Andrew
Seiko Epson Corporation
Westin Edward P.
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