Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1988-06-03
1989-07-25
Hudspeth, David
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307443, 307480, 307591, 307303, 357 45, H03K 19177
Patent
active
048517178
ABSTRACT:
A master slice integrated circuit comprises a first linear cell array of logic gates and a second linear cell array of first and second groups of flip-flop cells and a clock distributor cell having a plurality of clock outputs. To deduce the size of flip-flop cells and clock propagation times, the flip-flops are formed of custom-made circuit configuration. A wire pattern region is arranged in parallel with the first and second liner cell arrays for interconnecting the logic gates to create cells having desired logic functions and connecting inputs and outputs of the logic function cells to data inputs and outputs of the flip-flop cells and for connecting the clock outputs of the clock distributor cell to the clock inputs of the flip-flop cells. To reduce clock skew, the flip-flop cells of the first group are located adjacent to one end of the second linear cell array and those of the second group are located adjacent to the other end of the array so that the flip-flop cells of each group are located in substantially symmetrical relationships with respect to the clock distributor cell.
REFERENCES:
patent: 3597641 (1971-08-01), Ayres
patent: 4523106 (1985-06-01), Tanizawa et al.
patent: 4584653 (1986-04-01), Chih et al.
patent: 4611236 (1986-09-01), Sato
patent: 4639615 (1987-01-01), Lee et al.
patent: 4745084 (1988-05-01), Rowson et al.
patent: 4750027 (1988-06-01), Asami
patent: 4755704 (1988-07-01), Flora et al.
patent: 4761567 (1988-08-01), Walters, Jr. et al.
patent: 4780753 (1988-10-01), Ohkura et al.
patent: 4780846 (1988-10-01), Tanabe et al.
Anceau et al, "Complex Integrated Circuit Design Strategy", IEEE JSSC, vol. SC-17, No. 3, 6-1982, pp. 459-464.
Klein et al, "A Study on Bipolar VLSI Gate-Arrays Assuming Four Layers of Metal", IEEE JSSC, vol. SC-17, 6-1982, pp. 472-480.
Hudspeth David
NEC Corporation
LandOfFree
Master slice integrated circuit capable of high speed operation does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Master slice integrated circuit capable of high speed operation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Master slice integrated circuit capable of high speed operation will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2360477