Master-slave type flip-flop circuit

Details Master-slave type flip-flop circuit Master-slave type flip-flop circuit

1986-07-18

1988-10-18

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307480, 307269, 307442, 371 61, H03K 3284, H03K 1900

Patent

active

047790091

ABSTRACT:
In a master-slave type flip-flop circuit including a normal function in a normal mode for flip/flop operation and a scanning function in a scanning mode for testing an integrated circuit, the master-slave type flip-flop circuit comprises: a master stage having a first pair of differential transistors for taking in data, a second pair of differential transistors for latching data taken in to the first pair of differential transistors, a third pair of differential transistors for taking in scanning data, and a fourth pair of differential transistors for activating the second and third pair of differential transistors in the scanning mode; and a slave stage having a first pair of differential transistors for taking in data from the master stage, a second pair of differential transistors for latching data taken in to the first pair of differential transistors, a third pair of differential transistors for latching scanning data, and a fourth pair of differential transistors for activating the first and third pair of differential transistors in the scanning mode.

REFERENCES:
patent: 4441075 (1984-04-01), McMahon
patent: 4535467 (1985-08-01), Davis et al.
patent: 4580066 (1986-04-01), Berndt
patent: 4628277 (1986-12-01), Berndt

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