Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1990-12-26
1992-01-28
Hudspeth, David
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
3672722, 364716, H03K 19177
Patent
active
050846361
ABSTRACT:
In a semiconductor integrated circuit, upstream slave mode logic devices are informed successively of the completion of configuration for each slave mode logic device through a data line connected to the slave side, and a master mode logic device is finally informed of the completion of the configuration for all slave mode logic devices. Hereby, generation of a basic clock for the master mode logic device is controlled without use of a large-scaled circuit such as a pulse counter. Additionally, period of the clock supplied from said master mode logic device to each slave mode logic device is temporarily changed upon the completion of the configuration for all slave mode logic devices to inform each slave mode logic device of the completion of the configuration of all slave mode logic devices.
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Hudspeth David
Kawasaki Steel
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