Master-slave flip-flop circuit

Details Master-slave flip-flop circuit Master-slave flip-flop circuit

1989-05-09

1991-03-19

Callahan, Timothy P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307289, H03K 3289

Patent

active

050013610

ABSTRACT:
A master-slave flip-flop circuit is made up of a master part which holds a data signal responsive to a clock signal and outputs the held data signal in the form of complementary output signals, and a slave part which holds the complementary output signals responsive to the clock signal and outputs at least one of the held complementary output signals. The complementary output signals of the master part have a logic amplitude which is smaller than a logic amplitude of the output signal of the slave part to ensure correct operation even when the data signal and the clock signal have high frequencies.

REFERENCES:
patent: 4551639 (1985-11-01), Takeda et al.
patent: 4560888 (1985-12-01), Oida
patent: 4601049 (1986-07-01), Wilhelm et al.
patent: 4779009 (1988-10-01), Tsunoi et al.
patent: 4810908 (1989-03-01), Suzuki et al.

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