Master-slave flip-flop arrangement with slave section having a f

Details Master-slave flip-flop arrangement with slave section having a f Master-slave flip-flop arrangement with slave section having a f

1983-08-29

1985-05-14

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307456, 307289, 307291, 307247R, H03K 3289, H03K 3287, H03K 329

Patent

active

045174750

ABSTRACT:
A TTL flip-flop having improved AC and DC characteristics is provided including a higher resistance to output degradation and quicker transition time from a high state to a low state. The flip-flop includes a master section adapted to receive a data input signal and a clock pulse and includes a first output terminal for providing a Q output signal and a second output terminal for providing a Q output signal. A slave section is coupled between the master section and output buffers for latching the Q and Q outputs. The slave section comprises first and second latch portions, each responsive to a signal from the master section and coupled to one of the output buffers. The latch portions are similar and include a first transistor having a collector coupled to one output terminal and an emitter coupled to the master section. A second transistor has a first emitter coupled to the emitter of the first transistor and a third transistor has a collector coupled to the collector of the first transistor. A fourth transistor has a collector coupled to a second emitter of the second transistor and a base coupled to an emitter of the third transistor.

REFERENCES:
patent: 3474263 (1969-10-01), Kalb
patent: 3558931 (1971-01-01), Chernoske
patent: 3569745 (1971-03-01), Kardash
patent: 3591856 (1971-07-01), Kalb
Wong, "JK Flip-Flop", IBM Tech. Bulliten, vol. 24, No. 4, Sep. 1981.

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