Master and slave CPU system where the slave changes status bits

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Details

36493144, 3642286, 364DIG2, G06F 1310

Patent

active

051596911

ABSTRACT:
A master slave CPU system comprises a resetting device for resetting the control conditions of all of the control objects coupled to the respective slave CPUs and a setting device for sending to the slave CPUs set signal or set signals of only the control objects which are to be enabled when the control mode is changed.

REFERENCES:
patent: 4633405 (1986-12-01), Ito et al.
patent: 4811052 (1989-03-01), Yamakawa et al.

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