Boots – shoes – and leggings
Patent
1996-09-16
1999-02-16
Bowler, Alyssa H.
Boots, shoes, and leggings
3958001, 39580011, 364DIG1, G06F 702
Patent
active
058729879
ABSTRACT:
A massively-parallel computer includes a plurality of processing nodes and at least one control node interconnected by a network. The network faciliates the transfer of data among the processing nodes and of commands from the control node to the processing nodes. Each each processing node includes an interface for transmitting data over, and receiving data and commands from, the network, at least one memory module for storing data, a node processor and an auxiliary processor. The node processor receives commands received by the interface and processes data in response thereto, in the process generating memory access requests for facilitating the retrieval of data from or storage of data in the memory module. The node processor further controlling the transfer of data over the network by the interface. The auxiliary processor is connected to the memory module and the node processor. In response to memory access requests from the node processor, the auxiliary processor performs a memory access operation to store data received from the node processor in the memory module, or to retrieve data from the memory module for transfer to the node processor. In response to auxiliary processing instructions from the node processor, the auxiliary processor performs data processing operations in connection with data in the memory module.
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U.S. Patent Application Serial No. 08/202,394 filed Feb. 25, 1994 (Abstract and Drawings only included).
Abuhamdeh Zahi S.
Cassiday Daniel R.
Douglas David C.
Ganmukhi Mahesh N.
Hill Jeffrey V.
Bowler Alyssa H.
Nguyen Dzung C.
Thinking Machines Corporation
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