Mass memory access method and apparatus

Details Mass memory access method and apparatus Mass memory access method and apparatus

1979-03-01

1980-04-15

Fears, Terrell W.

Static information storage and retrieval

Addressing

365 73, 365222, G11C 1300

Patent

active

041986997

ABSTRACT:
A method and apparatus for transferring digital data between a mass memory and a random access memory. The mass memory has a plurality of memory loops, each having a plurality of memory cells, and a read/write device which either outputs data from the memory cells or inputs data to the memory cells. Each memory cell is identified by an address that specifies its place in the loop sequence starting from a reference cell. A loop position counter is set at zero when the reference cell of the selected memory loop is at the read/write device. The loop position counter is advanced by one count each time the next memory cell in the sequence is moved into operative relationship with the read/write device. Transfer of data between the mass memory and the random access memory is accomplished without any delay under the control of a random access memory address counter which is synchronized with the loop position counter. A transfer counter terminates the data transfer when an entire data loop has been transferred into or out of the mass memory. Since the loop position counter and random access memory address counter are synchronized, the transferred data will be written into the correct memory cells in either memory regardless of which mass memory cell is in operative relationship with the read/write device at the time the data transfer is initiated. Thus, this invention eliminates latency time in the transfer of data between a mass memory and a random access memory.

REFERENCES:
patent: 4130894 (1978-12-01), Merrill et al.

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