Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Having substrate registration feature
Reexamination Certificate
2005-03-15
2005-03-15
Wilson, Allan R. (Department: 2815)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Having substrate registration feature
C257S797000, C438S462000, C438S975000
Reexamination Certificate
active
06867109
ABSTRACT:
The present invention discloses a mask set for compensating for a misalignment between the patterns and method of compensating for a misalignment between the patterns. A mask set of the present invention comprises a first mask consisted of a mask substrate on which a main pattern and a plurality of sub-patterns are formed, said sub-patterns formed at a side of the main pattern; a second mask consisted of a mask substrate on which a plurality of hole patterns are formed, the hole patterns corresponded to spaces between the main pattern and the sub-patterns of the first mask, respectively when the first and second mask are overlapped to each other; and a third mask consisted of mask substrate on which a plurality of bar patterns are formed, the bar patterns corresponded to the hole patterns of the second mask, respectively when the second and third mask are overlapped to each other.
REFERENCES:
patent: 3808527 (1974-04-01), Thomas
patent: 4655598 (1987-04-01), Murakami et al.
patent: 4929083 (1990-05-01), Brunner
patent: 5308682 (1994-05-01), Morikawa
patent: 5672520 (1997-09-01), Natsume
patent: 5861679 (1999-01-01), Nagano
Hong Soon Won
Yang Tae Hum
Hyundai Electronics Industries Co,. Ltd.
Mayer Brown Rowe & Maw LLP
Wilson Allan R.
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