Mask programmable read-only memory stacked above a semiconductor

Details Mask programmable read-only memory stacked above a semiconductor Mask programmable read-only memory stacked above a semiconductor

1981-02-23

1984-01-03

Moffitt, James W.

Static information storage and retrieval

Read only systems

Semiconductive

357 15, 357 45, G11C 1706

Patent

active

044245793

ABSTRACT:
In the disclosed read-only memory, address decode means for addressing information in the memory lie in a semiconductor substrate; an insulating layer covers the address decode means; an array of spaced-apart metal lines and semiconductor lines lies on the insulating layer over the address decode means; outputs from the address decode means respectively couple through the insulating layer to the metal lines and to the semiconductor lines; and a plurality of mask selectable electrical contacts between the metal lines and semiconductor lines forms a matrix of mask selectable diodes over the insulating layer representative of the information in the memory.

REFERENCES:
patent: 3749987 (1973-07-01), Anantha
patent: 3906540 (1975-09-01), Hollins
patent: 4070654 (1978-01-01), Tachi
patent: 4099260 (1978-07-01), Lynes et al.
patent: 4128670 (1978-12-01), Gaensslen
patent: 4149301 (1979-04-01), Cook
patent: 4149302 (1979-04-01), Cook
patent: 4220961 (1980-09-01), Werner
patent: 4254428 (1981-03-01), Feth et al.

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