Mask pattern verification apparatus employing super-resolution t

Details Mask pattern verification apparatus employing super-resolution t Mask pattern verification apparatus employing super-resolution t

1998-09-22

2000-03-14

Font, Frank G.

Optics: measuring and testing

Inspection of flaws or impurities

Surface condition

3562371, 3562372, 356376, 430 5, G01N 2100, G03F 900

Patent

active

060380209

ABSTRACT:
A mask pattern verification apparatus includes a semiconductor circuit layout unit for generating layout data from semiconductor circuit data, a super-resolution corresponding pattern verification unit for verifying a pattern of the layout data generated by the semiconductor circuit layout unit according to a pitch with a line width and a space width, an optical simulation unit carrying out optical simulation on an error site of a pitch detected by the super-resolution corresponding pattern verification unit to output light intensity, and a contour output unit for generating and providing a contour according to the light intensity output from the optical simulation unit.

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"Mathematical and CAD Framework for Proximity Correction", N. Cobb et al., SPIE Symposium on Microlithography '96, Mar. 1996, Santa Clara, CA, pp. 1-15.
"Vector Aerial Image with Off-Axis Illumination", E. Barouch et al., SPIE vol. 1927 Optical/Laser Microlithography VI(1993) pp. 686-695.

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